In many electronic applications, it is often desirable or even required to protect electronic circuitry, such as on a printed circuit board (PCB), from unlawful or unauthorized access. This is especially true for electronic circuitry that includes cryptographic modules or functionality. For example, postage security devices (PSDs) are required by the United States Postal Service to comply with FIPS 140-2 level 3 issued by the National Institute of Standards and Technology (NIST). FIPS 140-2 level 3 requires that PSDs have a full envelope of physical tamper protection and detection which encloses all electrical nodes.
Prior art methods of tamper protection, such as disclosed in U.S. Pat. No. 5,858,500, involve wrapping the entire electronic circuitry, such as a PCB, in a flexible tamper respondent laminate. The laminate in such methods is soldered to the electronic circuitry to complete the detection circuits and potted using an encapsulating epoxy or the like. This method requires many hand operations and, as a result, is cumbersome and prone to causing damage to the sensitive tamper barrier wrap.
In addition, PCBs typically include high performance integrated circuits that get hot during operation. A PCB that is wrapped for tamper protection purposes must include some way of dissipating the heat generated by the integrated circuits included with the PCB.